Could you help to confirm why does the memory corruption occure after the clock adjusting?
Is there any wrong sequence for below code architecture?
1. Initialize SDRAM
2. Change clock: core 133Hz DRAM 66.5Hz
3. Initialize Nand Flash
4. Read bin file of Boot2 from Nand Flash to SDRAM
5. Jump to SDRAM， Run Boot2
1. Change ARM CPU mode to Supervisor
2. Change clock core: 399Hz DRAM 133Hz <--Memory corruption here（Memory corruption occures on 2 of 40 machines occasionally)
3. Run library function of IAR, Prepare environment for user main <--Program crash for memory corruption.
4. Run user's main function