Oscar Sanz

MCF52233 I2C no STOP state???

Discussion created by Oscar Sanz on Mar 7, 2008
Latest reply on Mar 10, 2008 by Mark Butcher
Hi to all ( again... )
 
Now is time to talk about I2C module on MCF52233.
 
I need to read multiple bytes from a I2C FRAM ( RAMTRON ). Everything is OK except for the last control status on the bus.
 
When is supposed to drive a STOP condition on to the bus, this is releasing SDA while SCL is high, nothing happens.
So i can read 8 bytes from the memory for example, but then there is no way to generate the stop condition.
 
I mean that nothing happens when:
 
 MCF_I2C_I2CR &= ~MCF_I2C_I2CR_MSTA;     /* generates stop condition */   
 
Any idea?
 
Maybe the code will clarify something:
( This is based on a code foun on this forum, not mine i'm only has adapted to multiple reading )
 
Code:
 MCF_I2C_I2CR |= MCF_I2C_I2CR_MTX;     /* setting in Tx mode */               MCF_I2C_I2CR |= MCF_I2C_I2CR_MSTA;     /* send start condition */ MCF_I2C_I2DR = adressaI2c;       /* devide ID to write */               while( !(MCF_I2C_I2SR & MCF_I2C_I2SR_IIF ));  /* wait until one byte transfer completion */ MCF_I2C_I2SR &= ~MCF_I2C_I2SR_IIF;     /* clear the completion transfer flag */               i=50;            /* Wait for a bit */ while(i--);  MCF_I2C_I2DR = (adressa>>8);      /* memory address */              /* wait until one byte transfer completion */ while( !(MCF_I2C_I2SR & MCF_I2C_I2SR_IIF ));  /* wait until one byte transfer completion */               MCF_I2C_I2SR &= ~MCF_I2C_I2SR_IIF;      /* clear the completion transfer flag */  i=50;            /* Wait for a bit */ while(i--);  MCF_I2C_I2DR = (adressa&0xff);      /* memory address */              /* wait until one byte transfer completion */ while( !(MCF_I2C_I2SR & MCF_I2C_I2SR_IIF ));  /* wait until one byte transfer completion */               MCF_I2C_I2SR &= ~MCF_I2C_I2SR_IIF;      /* clear the completion transfer flag */ i=50;            /* Wait for a bit */ while(i--);  MCF_I2C_I2CR |= MCF_I2C_I2CR_RSTA;     /* resend start */  i=50;            /* Wait for a bit */ while(i--);  MCF_I2C_I2DR = adressaI2c | 0x01;     /* device id to read */               while( !(MCF_I2C_I2SR & MCF_I2C_I2SR_IIF ));  /* wait until one byte transfer completion */ MCF_I2C_I2SR &= ~MCF_I2C_I2SR_IIF;     /* clear the completion transfer flag */   MCF_I2C_I2CR &= ~MCF_I2C_I2CR_MTX;     /* setting in Rx mode */      i=50;            /* Wait for a bit */ while(i--);  Buffer[0] = MCF_I2C_I2DR;       /* dummy read */               while( !(MCF_I2C_I2SR & MCF_I2C_I2SR_IIF ));  /* wait until one byte transfer completion */ MCF_I2C_I2SR &= ~MCF_I2C_I2SR_IIF;     /* clear the completion transfer flag */  MCF_I2C_I2CR &= ~MCF_I2C_I2CR_TXAK;  for(i=0;i<nBytes;i++) {  Buffer[i + blockOffset ]= MCF_I2C_I2DR;    /* read data received */             while( !(MCF_I2C_I2SR & MCF_I2C_I2SR_IIF ));  /* wait until one byte transfer completion */ MCF_I2C_I2SR &= ~MCF_I2C_I2SR_IIF;      /* clear the completion transfer flag */    if(i<nBytes-1)  {   //SCL_low();   //SDA_low();        //delay(TPLS);   //SCL_high();    //delay(TPLS);     /* send NO ACK */ // MCF_I2C_I2CR |= MCF_I2C_I2CR_RSTA;  MCF_I2C_I2CR &= ~MCF_I2C_I2CR_TXAK;    /* send ACK */  }  else   {   MCF_I2C_I2CR |= MCF_I2C_I2CR_TXAK;     /* send NO ACK */    }  }  i=50;            /* Wait for a bit */ while(i--); MCF_I2C_I2CR &= ~MCF_I2C_I2CR_MSTA;     /* generates stop condition */                 return 1;         

 

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