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SDK v2.0 Clock Configuration

Question asked by Peter Furey on May 27, 2016
Latest reply on Apr 5, 2017 by nethanja

Hi,

I'm trying to set up the clock configurations for a custom board using KDS_v3 and SDK_2.0_MK24FN1M0xxx12. The board has a MK24FN1M0VLL12 processor, an external 32MHz ECX-53B CPU crystal, and an external 32.768KHz ECX-31B RTC crystal. The only documentation that I've found to help me is the  K24 Sub-Family Reference Manual (K24P144M120SF5RM) and the Kinetis SDK v.2.0 API Reference Manual. I've come up with a first stab at a configuration but it hangs on start up at the following location.

main()->BOARD_BootClockRUN()->CLOCK_BootToPeeMode()->CLOCK_SetPbeMode():

(in CLOCK_SetPbeMode())

 

/* Wait for CLKST clock status bits to show clock source is ext ref clk */

while ((MCG->S & (MCG_S_IREFST_MASK | MCG_S_CLKST_MASK)) !=

           (MCG_S_IREFST(kMCG_FllSrcExternal) | MCG_S_CLKST(kMCG_ClkOutStatExt)))  // HANGS HERE

  {

  }

//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

void BOARD_BootClockRUN(void)
{
    CLOCK_SetSimSafeDivs();

    CLOCK_InitOsc0(&g_defaultClockConfigRun.oscConfig);
    CLOCK_SetXtal0Freq(BOARD_XTAL0_CLK_HZ);                   // 32000000U

    CLOCK_BootToPeeMode(g_defaultClockConfigRun.mcgConfig.oscsel, kMCG_PllClkSelPll0,
                        &g_defaultClockConfigRun.mcgConfig.pll0Config);

    CLOCK_SetInternalRefClkConfig(g_defaultClockConfigRun.mcgConfig.irclkEnableMode,
                                  g_defaultClockConfigRun.mcgConfig.ircs, g_defaultClockConfigRun.mcgConfig.fcrdiv);

    CLOCK_SetSimConfig(&g_defaultClockConfigRun.simConfig);

    SystemCoreClock = g_defaultClockConfigRun.coreClock;
}

///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

My configuration is as follows:


/*******************************************************************************
* Definitions
******************************************************************************/
/*! @brief Clock configuration structure. */
typedef struct _clock_config
{
    mcg_config_t mcgConfig;       /*!< MCG configuration.      */
    sim_clock_config_t simConfig; /*!< SIM configuration.      */
    osc_config_t oscConfig;       /*!< OSC configuration.      */
    uint32_t coreClock;           /*!< core clock frequency.   */
} clock_config_t;

 

/*******************************************************************************
* Variables
******************************************************************************/

/* Configuration for enter RUN mode. Core clock = 120MHz. */
const clock_config_t g_defaultClockConfigRun = {
    .mcgConfig =
        {
            .mcgMode = kMCG_ModePEE,             /* Work in PEE mode. */
            .irclkEnableMode = kMCG_IrclkEnable, /* MCGIRCLK enable. */
            .ircs = kMCG_IrcSlow,                /* Select IRC32k. */
            .fcrdiv = 0U,                        /* FCRDIV is 0. */

            .frdiv = 0U,
            .drs = kMCG_DrsLow,         /* Low frequency range. */
            .dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25%. */
            .oscsel = kMCG_OscselOsc,   /* Select OSC. */

            .pll0Config =
                {
                    .enableMode = kMCG_PllEnableIndependent, .prdiv = 0x7U, .vdiv = 0x6U,
                },
        },
    .simConfig =
        {
            .pllFllSel = 1U,        /* PLLFLLSEL select PLL. */
            .er32kSrc = 2U,         /* ERCLK32K selection, use RTC. */
            .clkdiv1 = 0x01140000U, /* SIM_CLKDIV1. */
        },
    .oscConfig = {.freq = BOARD_XTAL0_CLK_HZ,
                  .capLoad = 0,
                  .workMode = kOSC_ModeExt,
                  .oscerConfig =
                      {
                          .enableMode = kOSC_ErClkEnable,
                      }},
    .coreClock = 120000000U, /* Core clock frequency */
};

 

Is there any other documentation on clock configuration or any examples using the above tools (or something similar)?

Or is there something obvious in the above configuration that I'm doing wrong?

 

Much thanks,

Peter

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