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Cannot Connect to LS1020A with QorIQ DDR Validation Tool

Question asked by Per Franck on May 27, 2016
Latest reply on Jun 1, 2016 by Per Franck

Hello.

 

We are trying to validate our DDR4 settings on a custom LS1020A board, following the guides for the DDR Validation tool for the qoriq configuration in codewarrior. (http://cache.freescale.com/files/soft_dev_tools/doc/user_guide/QCVSDDRVGETSTARTUG.pdf )

 

In this guide, step 1.4, we are unable to connect to the hardware

We get a broken link next to the Target drop-down with the tooltip: Target is not ready: target does not respond and/or could not be reset.

 

We are using the CWTAP with USB / Ethernet connection, and we can debug programs on the system fine.

 

Our target settings are:

Processor: LS1020A

Probe Type: CWTAP

Target Access: CDDE

Probe Address: <mac address of CWTAP or IP Address of CWTAP or Blank>

JTAG Clock Speed: default (have tried a few different ones)

 

We are suspicious that this is due to the ARM not being alone on the JTAG chain, we have a Xilinx part in front of the ARM and our JTAG Config File for debugging program has:

 

Generic 6 1 0x3f

LS1020A <...>

DAP

SAP2

 

Any ideas?

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