B4860 core 0 released for boot but in doze after reset.

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

B4860 core 0 released for boot but in doze after reset.

Jump to solution
1,185 Views
jonathanbaird
Contributor I

Hi.

For initial bring-up of our B4860 we have selected the hard-coded RCW (cfg_rcw_src[0:8]=0b0_1000_0110).

Using a USB TAP we can get to a point where DCFG_CCSR_BRR = 0x00000001 (release core 0 for boot) but core 0 is in a doze state. How do we avoid this or recover from it?

We don't see the same behaviour with a B4860QDS with hard-coded RCW.

Our SYSCLK = 66.667MHz and DDRn_CLKs = 133.333 MHz.

In case it's related, we also see another difference between our system and B4860QDS: When looking at registers with USB TAP, reading I2C registers seems to crash something and registers become unreadable, needing a restart to recover.

I'm a B4860 rookie, so any help with where to start looking for the cause would be appreciated.

Thanks.

Labels (1)
Tags (3)
0 Kudos
1 Solution
881 Views
ufedor
NXP Employee
NXP Employee

1) Please refer to the B4860 Data Sheet Table 1. Pinout list by bus, Note 8 and confirm (after checking with a digital scope) that all relevant signals are not low during POR.

2) Please provide the schematics for inspection as searchable PDF.

It will be more convenient to create a Technical Case:

How I could create a Service Request? | NXP Community

View solution in original post

0 Kudos
4 Replies
882 Views
ufedor
NXP Employee
NXP Employee

1) Please refer to the B4860 Data Sheet Table 1. Pinout list by bus, Note 8 and confirm (after checking with a digital scope) that all relevant signals are not low during POR.

2) Please provide the schematics for inspection as searchable PDF.

It will be more convenient to create a Technical Case:

How I could create a Service Request? | NXP Community

0 Kudos
881 Views
jonathanbaird
Contributor I

Thank you ufedor!

That was exactly the problem. I have made the correction and now all looks normal.

You have saved us a lot of time.

Regards

Jon

0 Kudos
881 Views
ufedor
NXP Employee
NXP Employee

Which exactly pin caused the issue?

0 Kudos
881 Views
jonathanbaird
Contributor I

Hi.

All signals referred to by note 8 had accidentally been left floating during PORESET_B except for RESET_REQ_B.

It is clear in the datasheet. I don’t know how we managed to miss it!

Thanks again.

Jon

0 Kudos