MK61FN1M0VMJ12 power sequencing

[gopakumarg]

Kindly help me with the following

1.In the datasheet of MK61FN1M0VMJ12, in power up sequencing, it was given like

Power sequencing Voltage supplies must be sequenced in the proper order to avoid damaging internal diodes. There is no limit on how long after one supply powers up before the next supply must power up. Note that VDD and VDD_INT can use the same power source.

The power-up sequence is:

1. VDD/VDDA

2. VDD_INT

3. VDD_DDR

My question is

a. If I'm using same 3.3V for all the three voltages do the sequencing is still required ( I'm not using DDR in my application)

b. What is meant be "Note that VDD and VDD_INT can use the same power source." ? does it means that VDD and VDD_INT dont require power sequencing if both voltages are from same source?

2. I cant find details of coupling capacitors that should be put for the supply voltage pins in the datasheet. Can you please help me find the document containing the information

thanks

Kumar

[Hui_Ma]

Hi

1> Customer can tie VDDINT and VDD together. Obviously in this case the rails can come up and power down simultaneously.

As long as the rails come up in the right order there should be no issue. The goal would be to ensure that no rail reaches its minimum operating voltage before  the rails preceding it on the list. So VDDINT shouldn’t reach minimum operating voltage before VDD, but VDDINT can power up any time after VDD. There isn’t any requirement for a minimum or maximum amount of delay between VDD and VDDINT coming up.

2>  Customer could refer TWR-K60F120M or TWR-K70F120M boards schematics for the detailed power design info:

Wish it helps.

Have a great day,
Ma Hui
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