how to use PPS output of ENET_1588_EVENT0

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how to use PPS output of ENET_1588_EVENT0

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masashiwakatsuk
Contributor II

I have a MCIMX6DL-SD board and need to use PPS output of ENET_1588_EVENT0, but it doesnt work.
Does anyone know what to do to use PPS output in advance?

ptp4l command seems to be working as far as I see output log.

I guess function "fec_ptp_enable_pps" is not called.

-Kernel ver. 4.1.15(without any changes)
-Installed by Manufacturing tools
-register"IOMUXC_SW_MUX_CTL_PAD_GPIO19" is set to 0x00000001 by /unit_tests/memtool.

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6 Replies

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lily_zhang
NXP Employee
NXP Employee

masashiwakatsuki​, i have updated some information about pps under https://community.nxp.com/message/803430.

Please see whether it's also helpful for you. Usually 3 steps are required for pps test:

  • Add event0 out pin in dts: MX6QDL_PAD_GPIO_19__ENET_1588_EVENT0_OUT   
  • After kernel up, run commands:

ptp4l -A -4 -H -m -i eth0  &

echo 1 > /sys/class/ptp/ptp0/pps_enable

  • Use oscilloscope to capture the pps pin signal. Because the default BSP uses HIGH_PULSE setting, the pulse width is 8ns. You can try to change as TOGGLE mode for the test. It’s easy to capture signal with normal oscilloscope.

File: drivers/net/ethernet/freescale/fec_ptp.c

@@ -206,7 +208,7 @@ static int fec_ptp_enable_pps(struct fec_enet_private *fep, uint enable)
                val |= (1 << FEC_T_TF_OFFSET | 1 << FEC_T_TIE_OFFSET);
                val &= ~(1 << FEC_T_TDRE_OFFSET);
                val &= ~(FEC_T_TMODE_MASK);
-               val |= (FEC_HIGH_PULSE << FEC_T_TMODE_OFFSET);
+               val |= (FEC_TMODE_TOGGLE << FEC_T_TMODE_OFFSET);
                writel(val, fep->hwp + FEC_TCSR(fep->pps_channel));

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masashiwakatsuk
Contributor II

Thank you for your informatin.

I solved the problem by adding option below to phc2sys command.

phc2sys –s eth0 –d /dev/pps0 –c CLOCK_REALTIME –w –m &

now I can see 1PPS output from GPIO19.

thank you.

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Yuri
NXP Employee
NXP Employee

Hello,

   I hope the following helps

IEEE 1588 feature on i.MX6Q Gigabit Ethernet MAC

Have a great day,

Yuri

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masashiwakatsuk
Contributor II

Sorry for repaet reply.

I reread Reference Manual & Hardware Development Guide.

Default setting except GPIO19 seems to have no plobrem.

As a trial, I executed commands below, I can see the one shot pulse from GPIO19(ENET_1588_EVENT0_OUT).

So I think clock setting is correct and pps output initialization doesn't work for some reason

--commands--   

     /unit_tests/memtool 0218860C=40000000

     /unit_tests/memtool 02188608=7C

     #set TCC and TMODE register

----

Is there any dubitable setting possible?

Commands I use is below...

     phc2sys -s eth0 -c CLOCK_REALTIME -w

     ptp4l -A -4 -H -m -i eth0

thank you

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frankchenmh
Contributor III

Hi Masashi,

I use the same version kernel and have the same issue with you. Do you have resolved the issue? Thanks!

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masashiwakatsuk
Contributor II

Thank you for the information.

I think clock setting below is needed.

>1588 ts clock must come from GPIO_16/RGMII_TX_CTL PINs,  since you use RGMII mode, so the only method is from >GPIO_16.

>From internal:

>SOC PLL6_enet -> GPIO_16 -> loopback to 1588 ts clk.

>From external:

>External clock (from phy/ OSC) -> GPIO_16 -> loopback to 1588 ts clk.

I use RGMII mode, so I think  external clock to GPIO16 is needed.

But, there seems to be no check land of GPIO16 in iMX6 of MCIMX6DL-SD board. Is this correct?

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