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Spi with DMA

Question asked by Greg Huber on May 24, 2016
Latest reply on May 27, 2016 by Pavel Chubakov

I am currently integrating eDMA with the SPI driver on the LS1021A. Everything starts as expected but then stops without reason after only 2 or 3 frame transfers (8 or 16 bit frames). It appears that the TFFF flag gets reset and does not recover. The FIFO should not be full and a quick register dump confirms this. There are no other eDMA channels active, just this one. Has anyone else seen this behavior or might know why a DMA would just stop??

Thank You

 

Greg

 

Attached is a scope trace and below is a register dump from after the DMA stopped. The transfer should have been 16 8-bit frames.

 

[67163.983905] fsl-dspi 2100000.dspi:
[67163.987382] fsl-dspi 2100000.dspi:         SPI_MCR = 0x803f0000
[67163.993305] fsl-dspi 2100000.dspi:         SPI_TCR = 0x00030000
[67163.999223] fsl-dspi 2100000.dspi:       SPI_CTAR0 = 0x38001103
[67164.005117] fsl-dspi 2100000.dspi:       SPI_CTAR1 = 0x78000000
[67164.011083] fsl-dspi 2100000.dspi:       SPI_CTAR2 = 0x78000000
[67164.016979] fsl-dspi 2100000.dspi:       SPI_CTAR3 = 0x78000000
[67164.022909] fsl-dspi 2100000.dspi:          SPI_SR = 0xc0830030
[67164.028822] fsl-dspi 2100000.dspi:        SPI_RSER = 0x03030000
[67164.034717] fsl-dspi 2100000.dspi:       SPI_TXFR0 = 0x80010033
[67164.040638] fsl-dspi 2100000.dspi:       SPI_TXFR1 = 0x00000000
[67164.046535] fsl-dspi 2100000.dspi:       SPI_TXFR2 = 0x00000000
[67164.046535] fsl-dspi 2100000.dspi:     SPI_TXFR3 = 0x00000000
[67164.058372] fsl-dspi 2100000.dspi:       SPI_RXFR0 = 0x000000ff
[67164.064266] fsl-dspi 2100000.dspi:       SPI_RXFR1 = 0x000000ff
[67164.070187] fsl-dspi 2100000.dspi:       SPI_RXFR2 = 0x000000ff
[67164.076088] fsl-dspi 2100000.dspi:       SPI_RXFR3 = 0x00000000
[67164.082008] fsl-dspi 2100000.dspi:      SPI_CTARE0 = 0x00000000
[67164.087906] fsl-dspi 2100000.dspi:      SPI_CTARE1 = 0x00000000
[67164.093820] fsl-dspi 2100000.dspi:      SPI_CTARE2 = 0x00000000
[67164.099737] fsl-dspi 2100000.dspi:      SPI_CTARE3 = 0x00000000
[67164.105630] fsl-dspi 2100000.dspi:        SPI_SREX = 0x00000000

[67164.243449] fsl-edma 2c00000.edma:       DMA_CR    = 0x0000000c
[67164.249370] fsl-edma 2c00000.edma:       DMA_ES    = 0x00000000
[67164.255266] fsl-edma 2c00000.edma:      DMA_ERQ    = 0x00000002
[67164.261180] fsl-edma 2c00000.edma:      DMA_EEI    = 0x00000002
[67164.267107] fsl-edma 2c00000.edma:      DMA_INT    = 0x00000000
[67164.273029] fsl-edma 2c00000.edma:      DMA_ERR    = 0x00000000
[67164.278943] fsl-edma 2c00000.edma:      DMA_HRS    = 0x00000000
[67164.284862] fsl-edma 2c00000.edma:     DMA_EARS    = 0x1bf50000
[67164.290786] fsl-edma 2c00000.edma:     TCD_BASE[1] = 0xc08a1020
[67164.296687] fsl-edma 2c00000.edma:    TCD_SADDR[1] = 0xbe3e001c
[67164.302613] fsl-edma 2c00000.edma:     TCD_ATTR[1] = 0x0202
[67164.308179] fsl-edma 2c00000.edma:     TCD_SOFF[1] = 0x0004
[67164.313726] fsl-edma 2c00000.edma:   TCD_NBYTES[1] = 0x00000004
[67164.319645] fsl-edma 2c00000.edma:    TCD_SLAST[1] = 0x00000000
[67164.325546] fsl-edma 2c00000.edma:    TCD_DADDR[1] = 0x02100034
[67164.331459] fsl-edma 2c00000.edma:    TCD_CITER[1] = 0x000d
[67164.337016] fsl-edma 2c00000.edma:     TCD_DOFF[1] = 0x0000
[67164.342591] fsl-edma 2c00000.edma: TCD_DLASTSGA[1] = 0x00000000
[67164.348505] fsl-edma 2c00000.edma:    TCD_BITER[1] = 0x0010
[67164.354052] fsl-edma 2c00000.edma:      TCD_CSR[1] = 0x000a
[67164.359619] fsl-edma 2c00000.edma:
[67164.363102] fsl-edma 2c00000.edma:       DMAMUX[1] = +62

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