K66 RMII clocked on EXTAL0

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K66 RMII clocked on EXTAL0

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ianwilson
Contributor II

Hi all,

We are tearing our hair (what is left of it) out with a issue on a K66 - the RMII port is not pushing data to our PHY.

We have a K60 on a custom board that is loosely based on the TWR-K60F120M - same RMII pin allocation, same clocking (50MHz external oscillator on EXTAL0 and 12 MHz crystal on EXTAL) and same phy (Micrel KSZ8041NL). We decided we needed more RAM so have done a careful due diligence on pin function compatibility. Now we have removed some K60 and replaced with K66.

Now we are working on porting the code.  From our detailed comparison of the user manuals we were not expecting a big issue. And most was easy.  Ethernet is not working though.

We need to operate the RMII from the external 50 MHz signal on EXTAL0 (pin 72).  We have set SIM_SOPT2[RMIISRC]  to 0. The ENET module clock is enabled.  The ENET register settings are the same as our K60 build. Yet we see nothing on the RMII_TXEN signal on the K66 (we do see the expected pulse on the K60).

MQX RTCS_init goes through just fine (no error) and when we trace through the code the initial ARP_send function does not return any error. Reading back the phy registers through the MDIO channel shows all as expected (and this wouldn't stop the RMII_TXEN signal from behaving anyway).

It is as though we are not clocking the RMII peripheral.

Does anyone have any useful thought?

Many thanks in advance,

Ian

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19 Replies

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ishwarlal
Contributor III

Hi all,

Just wanted to share my Experience regarding the problem.

The solution proposed by Bill worked for me (We changed the "EREFS" bit in MCG_C2from "1" to "0" by changing the value of “SYSTEM_MCG_C2_VALUE” from 0x24 to 0x20). Thanks Bill

My Scenario is as follows:

1. Moved From MK60 to MK66 due to RAM limitation.

2. 50MHz external Oscillator connected to MCU (PTA18) as well as connected to Phy (KSZ8081RNA from Freedom Board).

3. First it didn't work because the 50MHz RMII clock could reach the EnetMac.

4. To check that rest of the hardware is fine, I just sent the OSCERCLK0 out (e.g to pin PTA6) and then looped it back to PTE26 as RMII clock to EnetMac module. This worked fine and confirmed that rest of the hardware is fine.

5. Finally tried the solution proposed by Bill (We changed the "EREFS" bit in MCG_C2from "1" to "0" by changing the value of “SYSTEM_MCG_C2_VALUE” from 0x24 to 0x20), and it worked which mean the RMII clock is routed internally and need not to be routed externally.

6. I am using the default system_MK66F18.h provided by NXP with following options/changes.

      #define CLOCK_SETUP                            1

      /* Value of the external crystal in Hz */
      #define CPU_XTAL_CLK_HZ                     50000000
      /* MCG_C2: LOCRE0=0,FCFTRIM=0,RANGE=2,HGO=0,EREFS=0,LP=0,IRCS=0 */
      #define SYSTEM_MCG_C2_VALUE         0x20U   /* MCG_C2 */
      /* MCG_C5: PLLCLKEN=0,PLLSTEN=0,PRDIV=4 */
      #define SYSTEM_MCG_C5_VALUE         0x04U   /* MCG_C5 */
      /* MCG_C6: LOLIE0=0,PLLS=1,CME0=0,VDIV=0x14 */
      #define SYSTEM_MCG_C6_VALUE         0x54U   /* MCG_C6 */

Hope this helps others.

lal

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maheshwarreddy
Contributor I

I had made the above mentioned all the changes and we selected the  CLOCK_SETUP == 1,even though it is not working sir send your Ethernet code once I will try .

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cfgmgr
Contributor III

Hi Maheshwar,

I’ve attached some example files to hopefully help you.

I’ve attached our modified version of the Freescale “system MK66F18.h” file (again, we use CLOCK_SETUP==5, so I can’t vouch for other modes). I’ve also extracted and copied our low-level Ethernet initialization routine into an example file. It will not compile in and of itself (you would need all our other include files and infrastructure) but hopefully it will help point you in the right direction.

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maheshwarreddy
Contributor I

I had done as given in the fine but not getting the interrupt

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cfgmgr
Contributor III

I'm sorry - I can't comment on Code Warrior generated code - I don't use Code Warrior or Keil (I use Rowley Crossworks).  But I can tell you that the code I used on my K60 did NOT work on the K66 until I changed the EREFS bit in the MCG_C2 register, and changed the interrupt vector numbers. Other than that, I needed no other changes to the K60 Ethernet code to get it to work on the K66.  Not sure if it's relevant, but I am not running the K66 at the full 180Mhz speed - I backed it off to 120Mhz until I can get all the other peripherals working properly.

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maheshwarreddy
Contributor I

ok.send your full ethernet application functions(init,send, receive)

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cfgmgr
Contributor III

Nothing changed in the send/receive code between the K60 and the K66.  Only the initialization changed, and I've already sent you that initialization code.   So if your K60 send/receive code worked OK, then your K66 code should work as well, assuming that you've initialized the ethernet system properly.  I still suspect that you might not be setting up MCG_C2 properly, or perhaps your interrupt vectors are wrong and you don;t have the correct IRQs enabled.

Try putting a scope on whatever pin you are using for TXEN on your PHY chip, and try to send a packet.  If you don't see that pin change state, then your MCG_C2 setting is probably still wrong (indicating that your're not clocking the ethernet section of the chip).

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maheshwarreddy
Contributor I

not coming out any thing ,TXEN,TXD0,TXD1

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maheshwarreddy
Contributor I

send ethernet full application ,,

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maheshwarreddy
Contributor I

How to enable the interrupt I don't know , I used the code warrior generated code for k60 , I ported to keil for k66 I copied all the function but I don't know how to enable the interrupt in that ,

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maheshwarreddy
Contributor I

it is not downloading  , It is going tosome other site 

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maheshwarreddy
Contributor I

But same thing is copied to k60 it is working in keil.

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maheshwarreddy
Contributor I

I had done all the changes which are mentioned above but same problem iam facing .But iam using only 50Mhz on PTA18(pin 72),but still iam not getting any interrupt .

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cfgmgr
Contributor III

Hi Maheshwar,

 

The problem for us was in the early startup initialization code that enables the clocks and PLLs and all.  We used the standard Freescale “system_MK66F18.h” file, and we use CLOCK_SETUP == 5.

 

We made two modifications to this file:

   1) We changed the external system clock frequency constant “CPU_XTAL_CLK_HZ” from 16Mhz to 50Mhz (we use 50Mhz on pin 72)

   2) We changed the "EREFS" bit in MCG_C2from "1" to "0" by changing the value of “SYSTEM_MCG_C2_VALUE” from 0x24 to 0x20

 

Also keep in mind that the interrupt vector numbers for ethernet interrupts are different on the K66 than they were on the K60.

I hope this helps.

-bill

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Hui_Ma
NXP TechSupport
NXP TechSupport

Hi

Customer could check and download the MQX V4.2 from here,​which provide RTCS example based on TWR-K65F180M board.

The TWR-K65F180M board is using PTE26 (ENET_1588_CLKIN) pin to input 50MHz RMII clock from TWR-SER board.

While, customer could get 50MHz RMII clock from PTA18 (EXTAL0) pin, customer need to config related ENET module pins as their ENET function with Pin Control Register (PORTx_PCRn). And customer also could refer MQX V4.2 RTCS example to check if there with any other register difference setting about ENET modules.


Wish it helps.

Have a great day,
Ma Hui
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cfgmgr
Contributor III

Did you ever resolve this problem?  We are having exactly the same problem (same basic design - 50Mhz EXTAL0, Micrel KSZ8041NL, switched from K60 to K66, because we needed more RAM).  Aside from vector numbers changing, did not see much difference in the K66 setup from K60, yet cannot seem to get ENET to work (xmit or receive).  IRQ handlers are not getting called.  NOTE - we are not using MQX.

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cfgmgr
Contributor III

SOLVED! (Many thanks to Ian Wilson and his team!!)

For anyone else who has this ENET issue on a K66:  The solution (for us anyway) is to ensure that the "EREFS" bit in MCG_C2 is cleared to "0" (select external reference clock).  By default, this bit was set to "1" in "system_MK66F18.h".   I had overlooked this, because while EREFS set to "1" works OK on a K60, it doesn't work on a K66.

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maheshwarreddy
Contributor I

hi

Can you please send the Ethernet code to me  for k66 controller(mk66fn2m0vlq18) .

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Hui_Ma
NXP TechSupport
NXP TechSupport

Thank you for the sharing this point about K66 MCG_C2 register EREFS bit issue.

best regards,

Hui

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