I’m trying to chase down what appears to be a spurious interrupt on the i.MX28 processor. Looking for clarification on the operation of ICOLL and inconsistencies in the vector generation. A dump of the ICOLL registers after ISR entry shows the following:
HW_ICOLL_VECTOR indicates the source bit number is 3 (vdda_brownout_irq). HW_COLL_RAWx indicates that it is source 32 (emi_error_irq). HW_ICOLL_STAT indicates that it is source 127 (pinctrl0_irq).
Can someone clarify if we are interpreting the ICOLL registers correctly and explain the inconsistencies?
Thanks in advance.