ls1021atwr SMMU configuration

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ls1021atwr SMMU configuration

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vsiles
Senior Contributor I

I'm trying to configure the SMMU1 of my LS1021ATWR board so that the SD controller is tagged as secure but the rest is left as normal.

TZASC is activated, with NS RAM / S RAM configured to protect my secure OS from Linux. From my understanding, the SSD_Index from the SMMU v1 documentation is called ICID in the reference manual of this board.

1) Is this true ? Am I mistaken here ?

In u-boot, I setup the ICID using the dev_stream_id array, so SD controller ICID is 0xa.

However, I have to set SMMU_SSDR0 to 0xfffffffe in order to u-boot to be able to write my secure kernel in Secure memory. Why is the relevant bit of SSDR0 1, instead of 0xa ? Can I configure each peripheral behind SMMU1 separately or do they all have the same configuration ?

Best,

V.

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vsiles
Senior Contributor I

U-boot code is buggy in NXP SDK 1.9 (and in mainline too). ICID are written to the LSB of the ICID register, but the reference manual dictate that they should be written in the MSB (shifted by 24).

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vsiles
Senior Contributor I

U-boot code is buggy in NXP SDK 1.9 (and in mainline too). ICID are written to the LSB of the ICID register, but the reference manual dictate that they should be written in the MSB (shifted by 24).

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