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CDR Not getting locked on SERDES Lane 7 in T2081

Question asked by Manish Raturi on May 12, 2016
Latest reply on May 12, 2016 by ufedor

Hi We are using T2081 processor on our board. We are using 0xD6 as serdes protocol. On lane 7 which is connected to MAC 6 the CDR is not getting locked constantly.  It is fluctuating sometime up sometime down. How to debug this and what can be the reason of this problem?

 

Just to add the LANE 1 CDR is constant always and is locked properly

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