How to set 115200 baud rate in MC9S08DZ60

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How to set 115200 baud rate in MC9S08DZ60

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sakthivelkuland
Contributor III

Hi all,

 

I have using MC9S08DZ60 for my application , i want to set 115200 baud rate using the 4MHZ external crystal?

Please can any one help me find the bus clock for setting 115200 BR.

What is the BUSCLK is suitable for setting 115200 BR using 4MHZ external crystal?

 

Thanks in advance for your help?

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sakthivelkuland
Contributor III

thanks for your valuable response,

hopefully if i have change the crystal values to 8MHz can DZ60 will support the 115200BR for SCI Communication. Else can you please suggest the crystal values to be changes?

If i use 8Hhz extral crystal for DZ60 not suppport FEE operation Mode instead need to use PEE Operation mode  for getting 24Mhz BUSCLK.

This changes is very much critical stage for my project we have completed all development  work for this DZ60 based. Now change the MUC is very critical So please can you suggest the solution for help me.

Thanks in advance.

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tonyp
Senior Contributor II

The baud rate is determined by baud=bus/(16*br) where br is the baud rate register, and can take values from 1 to 8191.

So, replace baud with your target of 115200, and solve for bus, and you have: bus=1843200*br

Now, you can fill in your expected bus (say, 24MHz), and get the needed BR value => 13.0208

Not an exact value, so your baud rate (with a rounded BR of 13 -- the closest to 13.0208) will be a little off.  I believe up to 5% off total on both sides is acceptable for correct operation.

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sakthivelkuland
Contributor III

Thanks for your response,

I want to  know some more details about calculating BUSCLK(24MHZ) using 4MHZ external crystal.

*When i go through the datasheet for setting RDIV  register (i.e Page no 140 If the FLL is selected, the resulting frequency must be in the range 31.25 kHz to 39.0625 kHz. If the PLL is selected,the resulting frequency must be in the range 1 MHz to 2 MHz).

*Operational Modes i'm using FEE(FLL Engaged External) FLL as Clock Source Select.

For generate the 24MHZ BUSCLK ,FLL Clock Source can not be use as my understanding, Need to Use PLL Clock Source. How i should configure the MCG Control Register to get the  MCGOUT = 48Mhz  so BUSCLK=24Mhz .

MCG Register's Initialization

  /* MCGC2: BDIV=00,RANGE=1,HGO=0,LP=1,EREFS=1,ERCLKEN=1,EREFSTEN=1 */

  MCGC2 = 0x2F;                    

  /* MCGC1: CLKS=00,RDIV=001,IREFS=0,IRCLKEN=0,IREFSTEN=0 */

  MCGC1 = 0x08;                     

  /* MCGC3: LOLIE=0,PLLS=1,CME=0,VDIV=1000 */

  MCGC3 = 0x46;     

while(!MCGSC_OSCINIT)               /* Wait until external reference is stable */             

while(MCGSC_IREFST)               /* Wait until external reference is selected */

while(!MCGSC_LOCK)                 /* Wait until FLL is locked */

while((MCGSC & 0x0C) != 0x0C)  /* Wait until PLL clock is selected as a bus clock reference */

Please help me to if any wrong values settings.

Thanks In Advance.

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vicentegomez
NXP TechSupport
NXP TechSupport

Hi

The S08DZ only can run at 40 MHz of CPU clock, this is 20 MHz of bus clock.

I believe that if you want to use the 4 MHz crystal, you can not get a proper divider to get the 115200 of baud rate for the SCI comunication, the near one is set the MCG in PEE mode with a bus clock of 20 MHz set the divider of the SCI to 11 to get a baud rate of 113636, I believe this is not a good option.

maybe you can select an slower  baud rate like 38400 (with the bus clock of 20 MHz you can get 37879)

Regarding to the Clock configuration you can check the following application note, there is a sample code for the DZ family

AN3499

If you really need to have the 115200 baud rate, I can send you the sample code that set the DZ at 20 MHz and the baud rate will be 113636, maybe you will lost some data.

Or what configuration can work for you.

Please let me know you comments

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sakthivelkuland
Contributor III

Hi ,

Really thanks for your reply,

I found this is information useful for me, actually already i have configured CUP Clock 32MHz  and BUSCLK 16Mhz and SCI communication working at Baud-rate 57600. I have used FEE Operation mode for generating BUSCLK at  16Mhz.

Now i have some problem, we used the same MC9S08DZ60 Controller for communication with Bluetooth module  through SCI but the Bluetooth Module can support the High Baud-rate 115200. How i can used this controller to support the Bluetooth Module at 115200 BR. i have using 4Mhz external crystal.

For the testing purpose  I have used PEE operation mode to generate 24Mhz using 4Hmz external crystal with 115200 BR its looks SCI communication works with 10 bytes of data transmitting and receiver side also received without data loss. But this Configurations is correct and controller is work fine i don't know, Because as your information BUSCLK max 20Mhz.

Please can you suggest any other controller available with the same family can support 115200 BR and Flash memory will more then 60KB.

Please your suggestion mostly helpful for my application design and development.

Thanks in advance.

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kef2
Senior Contributor IV

Like already mentioned by Pedro Vicente Gomez Salazar Employee, your DZ shouldn't operate properly at 24MHz bus clock. Top limit is 20MHz! Your best bet would be to replace oscillator with multiple of 115200*16 = 1843200 Hz suggested above by Tony Papadimitriou. 1.8432MHz and  3.6864MHz crystals should be available in stock.

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vicentegomez
NXP TechSupport
NXP TechSupport

The S08DZ can support the 115200 SCI baud rate, you just need to change the crystal value.

Other option is the MC9S08JM60 family that can run at 24 MHz of bus clock.With this bus clock you can get the 115200 for the baud rate using the 4 MHz crystal.

And if you need more flash you can use the MCF51JM128 that is the coldfire version for the S08JM60.

Please let me know if you need more information

Regards

Vicente Gomez

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