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UART2 clock configuration in TWR-K53N512

Question asked by community community123 on May 6, 2016
Latest reply on May 16, 2016 by Alice_Yang

How to setup the clock configuration for uart 2 in TWR K53N512 in IAR,i we have selected the default core clock as 50 Mhz later its calculated in peripheral clock and then that its pushed into uart_init for further processing..

 

But at the Real term and the tera term are showing the junk value....

 

#define REF_CLK         XTAL8               //XTAL8
#define CORE_CLK_MHZ    PLL50  /* system/core frequency in MHz */ 

main()

{

          core_clk_mhz = pll_init(CORE_CLK_MHZ, REF_CLK);

                  core_clk_khz = core_clk_mhz * 1000;

         periph_clk_khz = core_clk_khz / (((SIM_CLKDIV1 & SIM_CLKDIV1_OUTDIV2_MASK) >> 24)+ 1);

 

       /* Enable the UART2_TXD function on PTD3 */

          PORTD_PCR3 = PORT_PCR_MUX(0x3); // UART is alt3 function for this pin

 

          /* Enable the UART2_RXD function on PTD2 */

         PORTD_PCR2 = PORT_PCR_MUX(0x3); // UART is alt3 function for this pin 

 

       uart_init (UART2_BASE_PTR, periph_clk_khz, 115200 );

 

while(1)

{

uart_putchar(UART2_BASE_PTR ,'a');

 

}

 

}

void uart_init (UART_MemMapPtr uartch, int sysclk, int baud)

{

    register uint16 sbr, brfa;

    uint8 temp;

   

    /* Enable the clock to the selected UART */   

    if(uartch == UART0_BASE_PTR)

        SIM_SCGC4 |= SIM_SCGC4_UART0_MASK;

    else

        if (uartch == UART1_BASE_PTR)

            SIM_SCGC4 |= SIM_SCGC4_UART1_MASK;

        else

            if (uartch == UART2_BASE_PTR)

                SIM_SCGC4 |= SIM_SCGC4_UART2_MASK;

            else

                if(uartch == UART3_BASE_PTR)

                    SIM_SCGC4 |= SIM_SCGC4_UART3_MASK;

                else

                    if(uartch == UART4_BASE_PTR)

                        SIM_SCGC1 |= SIM_SCGC1_UART4_MASK;

                    else

                        SIM_SCGC1 |= SIM_SCGC1_UART5_MASK;

                               

    /* Make sure that the transmitter and receiver are disabled while we

     * change settings.

     */

    UART_C2_REG(uartch) &= ~(UART_C2_TE_MASK

                | UART_C2_RE_MASK );

 

    /* Configure the UART for 8-bit mode, no parity */

    UART_C1_REG(uartch) = 0;    /* We need all default settings, so entire register is cleared */

   

    /* Calculate baud settings */

    sbr = (uint16)((sysclk*1000)/(baud * 16));

       

    /* Save off the current value of the UARTx_BDH except for the SBR field */

    temp = UART_BDH_REG(uartch) & ~(UART_BDH_SBR(0x1F));

   

    UART_BDH_REG(uartch) = temp |  UART_BDH_SBR(((sbr & 0x1F00) >> 8));

    UART_BDL_REG(uartch) = (uint8)(sbr & UART_BDL_SBR_MASK);

   

    /* Determine if a fractional divider is needed to get closer to the baud rate */

    brfa = (((sysclk*32000)/(baud * 16)) - (sbr * 32));

   

    /* Save off the current value of the UARTx_C4 register except for the BRFA field */

    temp = UART_C4_REG(uartch) & ~(UART_C4_BRFA(0x1F));

   

    UART_C4_REG(uartch) = temp |  UART_C4_BRFA(brfa);   

 

    /* Enable receiver and transmitter */

    UART_C2_REG(uartch) |= (UART_C2_TE_MASK

                | UART_C2_RE_MASK );

       

       

        /* Enable interrupt on reception*/

         // UART_C2_REG(UART_C2_RIE_MASK) |= UART_C2_RIE_MASK;

     

         /* UART3_C2 |= UART_C2_RIE_MASK;  */ // old code was previously enabled

       

       

}

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