I'm getting a Bus Monitor timeout error when attempting to read from NAND flash on my P1013-based board.
So address I/O[0..7] pins on the flash part (MT29F8G08ADBDAH4-IT) tied to P1013 LB_AD[0..7].
This is the set-up, to make the NAND chip accessible:
|// LAWBAR6 - Local Bus NAND|
// bit 8 - 31 = 0xEFF00000 - base addr
MM_LAWBAR6 = 0x000eff00;
// bit 0 = 1 - enable window
// bit 7-11 = 00100 - Local Bus
// bit 26-31 = 001111 64k - size
MM_LAWAR6 = 0x8040000f;
// CS0 - NAND Flash
// BR0 base address at 0xEFF00000, port size 8 bit, FCM
eLBC_BR0 = 0xEFF00C21;
// OR0 64KB flash size, FCM (large page NAND Flash)
eLBC_ORf0 = 0xFFFF07AE;
// Flash Timeout: 8,388,608 cycles of LCLK
eLBC_FMR = 0x0000F000;
And this is an attempt to read the signature from the NAND part:
|eLBC_FCR = 0x90000000;||// Cmd Reg: "READ ID " cmd, no-op, no-op, no-op|
eLBC_MDRf = 0x00000000; // Data Reg: set flash offset as zero
eLBC_FPARl = 0x00000000; // Flash Page Reg: set page #0
|eLBC_FIR = 0x43BBBBB0;||// Instruct Reg: stream of 4-bit opcodes|
|eLBC_FMR = 0x0000F002;||// Mode Reg: exec cmds in FIR on next LSOR write|
|eLBC_LSOR = 0x00000000;||// trigger actions on NAND on Bank 0|
wait(200); // NOTE: wait time can be reduced by clocking the eLBC at higher speed
eLBC_NAND_Data = eLBC_MDRf; // copy read value to variable for return
When I do that write to LSOR, I get:
LTESR == 0x00000001
LTEATR == 0x10040801
These indicate a Bus Monitor timeout on read. Also, I do not see activity on CS0 when viewed with a logic analyzer.
Any thoughts as to why I'm getting the timeouts?