Hi,
There is a figure (Figure A-1 Current Injection on GPIO Port if Vin > VDDX) in the S12ZVC user manual, it shows there is a VBG and comparator in the voltage regulator, but I want to know the resistors value and when the P2 MOS will open or close.
Thank you,Snaku
Solved! Go to Solution.
Hi Snaku,
The scheme of Voltage Regulator at Figure A-1 is not the real circuit of the internal voltage regulator. It is a just very simplified version for indication of internal voltage regulator functionality.
Therefore, we cannot specify the resistor values.
The P2 work on continues conduction mode – it is not a switch. The P2 regulates their current for achieving stabilized 5V at VDDX line.
The Voltage regulator specifications are in chapter E.1 VREG Electrical Specifications (page 725, RM Rev1.3).
Despite in fact that the scheme of Voltage Regulator at Figure A-1 is simplified, it nicely shows potential issue with Injection currents and MCU in STOP mode. When Iin>Iload, the internal voltage regulator is not able to keep 5V at output VDDX line. So, we have to manage that Iload will be always higher than Iin – for example by adding some external resistor between VDDX and GND or by disconnection of Iin current source….
I hope it helps you.
Have a great day,
RadekS
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Hi Snaku,
The scheme of Voltage Regulator at Figure A-1 is not the real circuit of the internal voltage regulator. It is a just very simplified version for indication of internal voltage regulator functionality.
Therefore, we cannot specify the resistor values.
The P2 work on continues conduction mode – it is not a switch. The P2 regulates their current for achieving stabilized 5V at VDDX line.
The Voltage regulator specifications are in chapter E.1 VREG Electrical Specifications (page 725, RM Rev1.3).
Despite in fact that the scheme of Voltage Regulator at Figure A-1 is simplified, it nicely shows potential issue with Injection currents and MCU in STOP mode. When Iin>Iload, the internal voltage regulator is not able to keep 5V at output VDDX line. So, we have to manage that Iload will be always higher than Iin – for example by adding some external resistor between VDDX and GND or by disconnection of Iin current source….
I hope it helps you.
Have a great day,
RadekS
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
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