Why I can not access flecan registers in 8309, does it need to enable source clock source?

[carlpeng]

When I try to initiate flexcan in 8309, I found that can not access the flexcan registers, when I write to the flexcan registers address space, will pop exception. why? is it caused that some clock source are not enabled?

[carlpeng]

Thank you for your kindly answer.

But I still have some problems.

The phenomenon is that, on my 8309 platform, I can not access any flexcan registers, for example,

I can not access MCR register.

It is really strange, for all the device of 8309, only the flexcan register can not be access.

for example:

I use the following code to read MCR register:

mcr = *(UINT32 *)(0xe0000000 + 0x1c000)   /* 0xe0000000 is the base address of IMMR*/

But it will pop exception,.

[r8070z]

Have a great day,

Please check that you follow the FlexCAN Initialization Sequence described in the section 15.5 Initialization/Application Information of the MPC8309 reference manual rev.2 (It is available on the NXP site). It also explains how to set the clock source. For the MPC8309 flexcan it must be set to the bus clock. There is no any additional CAN clock sourse.

When disabled, FlexCAN shuts down the clocks to the CPI and MBM sub-modules. The flexcan module is disabled when as the manual says «MDIS bit negated». Notice that it corresponds to MCR[MDIS] =1. While MCR[MDIS] =0 enables the module.

Pay attention that some module registers may be considered as reserved space for some modes, see details in section 15.3 Memory Map/Register Definition of the reference manual.

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