Our original plan was to use an array of on-board Ram, with a SO-DIMM for expansion capability.
With two ranks for on board RAM [MCS0, MCS1], and two for the SO-DIMM [MCS2, MCS3].
Unfortunately the T1042 and T2081 have one one pair [0,1] of the MODT, MCK[+/-], and MCKE signals, which the documentation tells me are supposed to work with the matching MCS[n].
Is this mix doable? If so how are the clock and ODT signals routed to the ranks?
Thanks for your help,
Kyle von Schmacht