I think the code (AN4794) exists some errors..
about the DMA channel 1, there exist following codes,
EDMA.CHANNEL.TCDWORD20_.B.CITER_E_LINK = 1; // link to channel 0 on minor loop
EDMA.CHANNEL.TCDWORD20_.B.CITER_LINKCH = 0; //
EDMA.CHANNEL.TCDWORD28_.B.BITER_E_LINK = 0; // no link on minor loop
EDMA.CHANNEL.TCDWORD28_.B.BITER_LINKCH = 0;
In general ,we should configure the citer_e_link bit value equal to the biter_e_link bit value ,also citer_e_linkch and biter_e_linkch ,ortherwise a configuration error will be reported.
My confusion is from the corresponding technical report(AN4794), the result is normal , but we can get some information from RM(reference mannul), following is the description of the biter_e_link,
“This is the initial value copied into the citer.e_link field when the major loop is completed. The citer.e_link field controls channel linking during channel execution.” From this,we can get if the maior loop is completed,then the the citer_e_link bit value will be decided by the biter_e_link bit value.
If so,after completing one maior loop, then the citer.e_link will becmome 0 ,the case is in direct contradiction to the principle the author proposed. I can’t understand how he could get the right result,is my understanding wrong?
Thanks very much!
Original Attachment has been moved to: dma.c.zip
Original Attachment has been moved to: AN4794SW.zip