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Power-On Reset Sequence

Question asked by lianying zhang on Apr 13, 2016
Latest reply on Apr 13, 2016 by ufedor

Hello, About Power-On Reset Sequence, I have a question: At the end of this process, my custom board‘s hreset is always pulled high prior to poreset,which is in violation of the requirements of the reference manual, as shown below. As  i know, during the Power-On Reset Sequence process, hreset is an output  which is asserted by cpu , that is to say ,in this process, I can only control the poreset by programing? But no matter how I adjusted poreset by the program (I use PIC instead of CPLD), hreset always is pulled high prior to poreset, what's the possible reason causing it? In the figure below the yellow line represents poreset, the green line represents hreset.20160413_220645.jpg9202579CDA5BD7ADF67C3F7953939EEC.jpg

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