We have a customer looking to establish communication on the T1040 and P1011 via PCIe. These boards will start up independently and either one could reset without resetting the other. They are looking for information on the behavior of the PCIe controller in the error conditions. Scenarios they are concerned with are:
- Exactly what happens on a processor if it tries to talk to the other processor which is held in reset.
- Exactly what happens on a processor if it tries to talk to the other processor which is powered but has not yet configured the PCIe controller.
- What could happen if processor A is in the process of communicating with processor B when processor B resets