I need a simple example showing how to configure the KV5x PWM0 registers to generate high resolution pwm.
If you just want to use the nano-edge placement feature, you just need to change the following register:
1)set the PWMx_MCTRL1=0x03; //set MONPLL=3, in this setting, the PWM clock will be multiplied by 32 so taht you can get the 32 times clock frequency for fractional module.
2)set the PWMx_SMnFRCTRL register, if you want to enable the SMx fractional function, just set the FRAC_PU. If you want to enable the fractional function for the front edge, set the FRAC23_EN bit, if you want to enable fractional feature of hind edge, set the FRAC45_EN bit, if you want both edges, set both FRAC45_EN and FRAC23_EN. It is okay, in other words, generally:
BTW, I think the MONPLL input clock frequency should meet the frequency specification, for example, in normal run mode, the Fast Peripheral clock is 100mHz, I think the 100MHz clock as eFlexPWM clock is okay, the MONPLL can multiply it to 3.2GHz.
Hope it can help you.
I used the example of the thread: HRPWM example for MKV46?
I can not make this work or for KV4x or for KV5x. Changing the FRACVAL value does not change the duty cycle.
High resolution PWM is the feature that defines a Microcontroller as "for power converter applications". Why Freescale did not release a single example of how to use it?
I developed an example based on KV58 and KDS tools, which can demos the nano edge function of eFlexPWM, hope it can help you.
I attach the code here.
I attach the example code for the nano edge PWM.
I am sorry, in the above code and the PWM waveform, the eFlexPWM works in dithering mode instead of real nano-edge mode, I am developing the code so that the eFlexPWM works in real nano-edge PWM mode. I think I can finish it before the end of this week.
Sorry for the delay. I developed an example for the nano-edge placement feature of eFlexPWM based on TWR-KV58F220M and KDS ver3.0 tools. I attach the code and screenshot of the scope.
Regarding the code, you have to pay attention to the following items:
1)Only eFlexPWMA supports nano-edge placement feature, the eFlexPWMB module does not support the nano-edge placement feature, but the FlexPWMB module supports dithering mode.
2)The PLL part of MCG in the RM of KV5x has error, there is a divider2 after VCO, but the RM does not mention the divider2, which will leads wrong clock frequency.
/In the code, the MCG5=0x03, MCG_C6=0x50, VCO output will be [50MHz/(3+1)]*32=400MHz, after divider2, the MCGOUTCLK will be 200MHz, core/system clock is 200MHz
//Explanation:The eFlexPWM0 is driven by fast peripheral clock because the SIM_CLKDIV1 is 0x01370000. The fast peripheral clock frequency is 100MHz, the PWM signal frequency is 100MHz/16=6.25mhz.
//The fractional clock frequency is 32*100MHz=3.2G, the PWM0_SM0FRACVAL5=15<<11; the delay=15*(1/3.2G)=5nS
//The analysis match with the waveform on the scope:
//The yellow waveform is the PWMA_A0(A40 on primary elevator), the red waveform is the PWMA_B0(A39 on primary elevator)
I attach the code here, it is developed on KDS ver3.0 and TWR-KV58F220M tower board.
I tested your example and it worked. Changing the values of SM0FRACVAL2 and SM0FRACVAL3, changes the delay of the rising and of the falling edges of PWM0_A and Changing the values of SM0FRACVAL4 and SM0FRACVAL5, changes the delay of the rising and of the falling edges of the PWM0_B.
I also noted that at run time, the changes in SMxFRACVALx only takes effect after the instruction: PWM0_MCTRL0 |= 0x0007;
Thank you very much.
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