Section 18.104.22.168 of IMX6DQIEC, Table 58 states that TskewT is -100 to +900 ps. Is this instead of the nominal +/- 500 ps, i.e. a delay of 400ps? Is this adjustable in a register or fixed?
Note 3 states that this implies a TXC delay at the PHY of 1.2ns to 1.7ns instead of the nominal 1.5ns to 2.0ns - shouldn't this be 1.1ns to 1.6ns, if the TSC delay is 400ps?
Note 3 also says that this is for all versions of RGMII prior to 2.0. What if the PHY is RGMII 2.0? Does the PHY just add the delay instead of implementing the delay on the PCB?