We want to configure a DMA Direct Mode in the DMA engine 2.
I see in the MPC8306 Reference Manual for the register configuration, and I have a question regarding the DMAMR register.
The register DMAMR definition for the DRCNT is not clear. This bits is defined as "DMA request count. This field specifies the number of cache lines transferred per DMA request assertion".
We need to know the relationship between the definition of these bits with the DMA size value set in the register DMABCR.
For example, if we configura a 128 Byte DMA which value should be programed in the DMAMR[DRCNT].
Thank you in advance.