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Ls1043ardb U-boot cannot find Ethernet firmware

Question asked by Branden Sherrell on Mar 28, 2016
Latest reply on Mar 29, 2016 by Branden Sherrell

I booted into the default bank and made changes to the alternate bank per page 100 of the Release-Notes outlined to push a new U-boot build. The steps for doing so require that you first unprotect the target region of flash, which worked properly. However, somehow during the process of modifying the alternate-bank memory space, the default bank was corrupted despite it being in a protected area of memory -- or at least so it seems. Specifically, the following is now displayed on boot:

 

 

Boot-time display

U-Boot 2015.01QorIQ-SDK-V1.7+gc297f5b (Dec 20 2015 - 13:08:26)

 

Clock Configuration:

       CPU0(A53):1600 MHz  CPU1(A53):1600 MHz  CPU2(A53):1600 MHz 

       CPU3(A53):1600 MHz 

       Bus:      400  MHz  DDR:      1600 MT/s  FMAN:     500  MHz

Reset Configuration Word (RCW):

       00000000: 08100010 0a000000 00000000 00000000

       00000010: 14550002 80004012 e0025000 c1002000

       00000020: 00000000 00000000 00000000 00038800

       00000030: 00000000 00001101 00000096 00000001

Board: LS1043ARDB, boot from vBank 0

CPLD:  V1.4

PCBA:  V3.0

SERDES Reference Clocks:

SD1_CLK1 = 156.25MHZ, SD1_CLK2 = 100.00MHZ

I2C:   ready

DRAM:  Initializing DDR....

Detected UDIMM Fixed DDR on board

2 GiB (DDR4, 32-bit, CL=11, ECC off)

fsl-ppa: Bad firmware image (not a FIT image)

fsl-ppa: error (-22)

Not a microcode

Using SERDES1 Protocol: 5205 (0x1455)

fman_port_enet_if:71: port(FM1_DTSEC3) is OK

fman_port_enet_if:77: port(FM1_DTSEC4) is OK

Flash: 128 MiB

NAND:  512 MiB

MMC:   FSL_SDHC: 0

EEPROM: NXID v1

PCIe1: disabled

PCIe2: Root Complex no link, regs @ 0x3500000

PCIe3: Root Complex no link, regs @ 0x3600000

In:    serial

Out:   serial

Err:   serial

Net:   Fman1: Data at 0000000060300000 is not a firmware

No ethernet found.

Hit any key to stop autoboot:  0

 

I am not sure how the bank0 address space was modified, but apparently it was given the errors presented at boot. These errors seemed to stem from the fact that the U-boot environment was overwritten in the first bank -- but it can clearly be seen that the build time-stamp was December 20 (implying the original factory U-boot image is still present), while the alternate bank time-stamp (the new build I flashed) is March, as expected. Thankfully I have a second unmodified ls1043arb on-hand and was able to restore each variable to the original state as seen below:

 

Contents of U-boot environment variables

baudrate=115200

bootargs=console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,0x21c0500,115200

bootcmd=cp.b $kernel_start $kernel_load $kernel_size && bootm $kernel_load

bootdelay=3

console=ttyAMA0,38400n8

eth1addr=00:04:9F:04:1E:7A

eth2addr=00:04:9F:04:1E:7B

eth3addr=00:04:9F:04:1E:7C

eth4addr=00:04:9F:04:1E:7D

eth5addr=00:04:9F:04:1E:7E

eth6addr=00:04:9F:04:1E:7F

ethaddr=00:04:9F:04:1E:79

ethprime=FM1@DTSEC3

fdt_high=0xffffffffffffffff

fman_ucode=60300000

hwconfig=fsl_ddr:bank_intlv=auto

initrd_high=0xffffffffffffffff

kernel_addr=0x100000

kernel_load=0xa0000000

kernel_size=0x2800000

kernel_start=0x61100000

loadaddr=0x80100000

ramdisk_addr=0x800000

ramdisk_size=0x2000000

stderr=serial

stdin=serial

stdout=serial

 

 

Environment size: 778/131068 bytes

 

However, such changes did not solve the problem of U-boot being unable to find the various firmware sources. I also noticed that regardless of the value of fman_ucode in the U-boot environment will seemingly always look at 0x60300000 as the region for the fman firmware (what is this?) -- even when booting into the alternate bank despite its respective "fman_ucode" environment variable being something different.

 

Solving this problem would be made much easier is U-boot could find the Ethernet firmware since I could then leverage the TFTP capabilities and re-flash the device.

 

1) What are my other options here if I do not have a JTAG programmer? What JTAG programmer could be used to modify the CPLD flash memory? I do have a Dstream ARM debug unit if it can be used.

 

2) I do have a second LS1043arb on hand with the original factory flash image.

 

3) Am I doing something incorrect when attempting to re-flash the alternate bank?

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