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About Watch Dog Timer in  STOP and DOZE mode

Question asked by Norihiro Michigami on Mar 27, 2016
Latest reply on May 31, 2016 by richard_stulens

Hello NXP team,

 

I'm modifying my original comment I posted in other day.

I need NXP's support asap to solve our problem. Please advise me how to stop WDT when Vybrid is in STOP mode.

 

According to "VYBRIDRM: Vybrid Reference Manual: F Series - Reference Manual (REV 8)", page 1248 , I think I can stop WDT operation when Vybrid is in STOP mode. But in fact, I can't stop WDT in STOP mode and WDT keeps working even I set WDOG_WCR to "0x3F33" before I put Vybrid to STOP mode.  Could you advise me if any additional settings are needed to stop WDT in STOP mode?  Or this behavior is not supported in Vybrid?

 

===============

 9.7.5.4.1 STOP and DOZE mode

  If the WDOG timer disable bit for low power STOP and DOZE mode (WDZST) bit in

  the Watchdog Control Register (WDOG_WCR), is cleared, the WDOG timer continues

  to operate using the low frequency reference clock. If the low power enable (WDZST) bit

  is set, the WDOG timer operation will be suspended in low power STOP or DOZE mode.

  Upon exiting low power STOP or DOZE mode, the WDOG operation returns to what it

  was prior to entering the STOP or DOZE mode.

===============

 

Thanks,

Norihiro Michigami
AVNET

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