Now I configured FMPLL0,1 for 120MHz with 40MHz osc crystal.
Here are two choice for SPI clock:
1. CGM.SC_DC.B.DE=1; //enable clock div
CGM.SC_DC.B.DIV=11; //Peripheral clock is 120/(11+1) = 10M;
2. CGM.OSDC_SC.B.SELCTL = 0X2; //FMPLL
CGM.OSDC_SC.B.SELDIV=0X2; //system clock divide 120/4=30M
The SPI modules registers:DSPI_0.CTR.R=0x; //DBR=0,PBR=0(divide 2),BR=0b0101(divide 32)
- SCK baud rate =(Fsys/PBR)*(1+DBR)/BR,
Fsys=120MHz ? 10M ? 30M?
What is the Fsys value? Should I use CGM.SC_DC or CGM.OSDC_SC in sys clock function？
2. Is there any different between Peripheral set 0 clock and Clockout ?
I configure sys clock,Peripheral set 0 clock and Clockout I can't find them differece.