We (want to) use AUART module with 3.25MBs - as this is indicated as maximum speed in the reference manual p.1937.
According to this manual p.1939 - the proper divisor is:
24M x 32 / 3250000 = 236 = 0xEC - the smallest divisor allowed.
Writing this divisor in BAUD_DIVFRAC and BAUD_DIVINT - we got the following behaviour:
TX operates on any divisor setting between dec. 224 - dec 239 wiht 3.4MBps.
It really looks like the lowest 4 Bits of BAUD_DIVFRAC have no influence on the TX clock.
Otherwise it seems that this bits are used for RX clock - and then it makes a difference.
1.) Is there a document which describes TX clock / RX clock in detail ?
2.) There are 2 indications of a "HISPEED" mode in the manual - and a bit which gives details in the status register.
Is there a document describing HISPEED mode ?