AnsweredAssumed Answered

AIPSTZ in imx6.

Question asked by MyungJin Hwang on Mar 23, 2016
Latest reply on Mar 24, 2016 by MyungJin Hwang

Dear NXP team.


I have 2 questiosns...



     There are AIPSTZ_PACRs, AIPSTZ_OPACRs registers as bellow in the reference menual(Document Number:      IMX6DQRM Rev. 3, 07/2015).

     but no descriptions of AIPSTZ_PACRs, it only explain AIPSTZ_OPACRs


     where can i find AIPSTZ_PACRs?


     13.6 Initialization Information

     The AIPS bridge should be programmed before use.

     The following registers should be initialized: The Master Privilege Registers

     (AIPSTZ_MPRs), the Peripheral Access Control registers (AIPSTZ_PACRs), and the

     Off-platform Peripheral Access Control registers (AIPSTZ_OPACRs) described in AIPSTZ Memory Map/Register      Definition.



     As bellow description, I need to control AIPSTZx_MPR register.


     and i could see something wonder.

     I think i could write only AIPSTZx_MPR(0x0207_C000) to control MOROT0, MOROT1, MOROT2, MOROT3


     But in the u-boot source code, it write 0x0207_C000 and 0x0207_C004 to control MOROT0, MOROT1 as bellow.

     It's different with the reference menual.

     then I should write 0x0207_C008,0x0207_C00C to control MOROT2, MOROT3?

     Please give some guide in detailed as possible.


* Set all MPROTx to be non-bufferable, trusted for R/W,
* not forced to user-mode.
writel(0x77777777, &aips1->mprot0);
writel(0x77777777, &aips1->mprot1);


     and the physical memory dump is that


  AZSD:0207C000|>77777777 77777777 ???????? ???????? wwwwwwww????????

  AZSD:0207C010| ???????? ???????? ???????? ???????? ????????????????


Have a good day.

MyungJin Hwang