Hi,
We are using CW-TAP for interfacing P1013 Processor JTAG and facing serious issue in instability of JTAG interface with our processor. Some times we got connected and in debugger shell while using "REG ALL" command, it got hang in between and need to do disconnect / closing and re-doing the same. Please suggest to overcome the JTAG interface instability issue.
Below is the difference observed between the AN4343 Figure 5. JTAG Interface Connection to our schematic
1. JTAG pin 1: COP_TDO signal a 33.2E resistor (R67) is placed in series to TDO of processor P1013
2. JTAG Pin 8: Two 10K pullup resistors (R52 & R53) used for COP_CHKSTP_IN pin to processor
3. JTAG pin 6: COP_VDD_SENSE pin is connected to OVDD (3.3V) using 1E resistor R527 instead of 10E resistor.
4. Extra pullup in resistor R293, R404 and R401 are made to DNP in PCB assembly.
Please suggest that any of the above difference can cause the instability of the JTAG interface (debug connect/ Debugger shell/ flash download)
Hello, saravana kumar
Do you mean you can connect sometimes but sometimes you can't? Can you check the signal on TDO? Do you have stable power?
TDO is recommended be tied directly to processor.
Regards
Lunmin