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KL17 Bit SPMF in the SPIx_S field

Question asked by Marno Friebe on Mar 17, 2016
Latest reply on Jun 11, 2016 by Hui_Ma

On behalf of my customer:


At the SPI in the KL17 my customer has found a discrepancy, versus the KL25. I is the Bit SPMF in the SPIx_S field.

-          KL17P64M48SF2RM manual page 502

-          KL25P80M48SF0RM manual page 666


In both reference manuals is the statement: "To clear the flag, read SPMF when it is set and then write a 1 to it."

In the file MKL17Z4.h is "S" only defined for reading:

/** SPI - Register Layout Typedef */

typedef struct {

  __I  uint8_t S;                                  /**< SPI Status Register, offset: 0x0 */



At the KL25 file for read and write:

/** SPI - Register Layout Typedef */

typedef struct {

  __IO uint8_t C1;                                 /**< SPI control register 1, offset: 0x0 */

  __IO uint8_t C2;                                 /**< SPI control register 2, offset: 0x1 */

  __IO uint8_t BR;                                 /**< SPI baud rate register, offset: 0x2 */

  __IO uint8_t S;                                  /**< SPI status register, offset: 0x3 */


If one does a correction in the KL17 file to__IO, then compiling works, but the file isn't original any longer...

If one keeps the S-Register as only read, one gets during the compilation an error: "assignment of read-only member 'S'      SPI0->S |= 0x40;"


My customer thinks the .h-File is wrong and the reference manual is correct.


In both reference manuals is written under SPI status register (SPIx_S): "This register contains read-only status bits. Writes have no meaning or effect."

But in the flowcharts is the statement: READ SPMF WHILE SET TO CLEAR FLAG, THEN WRITE A 1 TO IT



Best regards,


Marno Friebe


Senior Field Application Engineer


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