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iMX6Q :  How to work a Watchdog Timer in the on-chip boot ROM code ?

Question asked by koichi sakagami on Mar 16, 2016
Latest reply on Mar 17, 2016 by koichi sakagami

Dear community,
I consider a Watchdog Timer (WDOG) behavior in the on-chip boot ROM code.

 

In figure 8-2 Serial Download Boot Flow of IMX6DQRM Rev. 3,
it said ARM core will reset if no any activity within 90 seconds when WDOG_ENABLE=1.


Then,
do the WDOG External signals  ( WDOGx_B ,WDOGx_RESET_B_D ) connect to iMX6 I/O pad ?

 

If Yes,
which pads are connected with WDOG External signals ?

          DISP0_DAT8 or GPIO_9 or SD1_DATA2 or DISP0_DAT9 or GPIO_1 or SD1_DATA3

 

Best Regards,
       Koichi Sakagami

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