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Question asked by Wongeun Chang on Mar 15, 2016
Latest reply on Mar 17, 2016 by Radek Sestak


I have one clarification on Timer usage. Currently, I am using "S912XEG128W1MAA".
For OS system timer, I have configured related registers as follows.

In Datasheet, fomular for the time-out period = (PITMTLD + 1) * (PITLD + 1) / fBUS

In Implementation,
.- PITMTLD(clock divider) : 47

.- PITLD(timeout counter) : 1000

.- fBUS : 48 MHz

With this configuration, I assumed 1000us timer to call a routine every 1000us.
Herewith, one confusion with the fomular from my side is..
Do I need to configure PITLD as 999 not 1000 to have 1000us cycle time?


Thanks and best regards,

Wongeun Chang