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Question asked by Michael Kachalov on Mar 11, 2016
Latest reply on Mar 17, 2016 by Michael Kachalov



Our team is looking at the P2020 processor and are looking to clarify a few things with respect to the DDR3 bus clock speed.


Looking at AN4261 (rev 4), Table 12 in section 6.1.2 states that the DDR3 memory bus clock speed has a range of 300 - 400 MHz. If we choose to run the DDR3 in synchronous mode, based off of note 3 (DDR data rate is the same as the platform frequency), would this imply our platform frequency must be between 300 and 400 MHz and the actual DDR data rate would be double that (600 to 800 MHz)? For example, based off of Table 18, if a 64MHz SYSCLK is used, we can choose 6:1 Platform ratio and get a 384 MHz Platform clock. The DDR3 data rate would then be 768 MHz.


If we would want to use a faster rate, we would have to use asynchronous mode. Does table 19 imply that we can bypass the 300 to 400MHz memory bus requirement and clock the controller up to 800 MHz in asynchronous mode? Thus, we can achieve a data rate up to 1600 MHz?


Thank you