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SGTL5000 I2S_SCLK and I2S_LRCLK

Question asked by Pinkesh Pachchigar on Mar 10, 2016

Hello  Everyone,

 

I want to configure codec for 8 kHz sample rate . As per datasheet , I  used values as mentioned below.SYS_FS bitfield of CHIP_CLK_CTRL equal to  0x2( 48 KHz)

RATE_MODE of CHIP_CLK_CTRL equal to 0x3 (1/6 of the SYS_FS rate) .

 

 

With this configuration , I2S_LRCLK value I am getting is around 16 KHz which is almost double of the required one.

Internal PLL has been enabled with input frequency equal to 12 MHz.

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