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Output voltage rule of VDD_SOC and VDD_PU

Question asked by ko-hey on Mar 7, 2016
Latest reply on Mar 8, 2016 by ko-hey

Hi all



I have question about operating range of i.MX6.

There is a following desctiption in Table 9's note of IMX6SLCEC.



VDD_SOC and VDD_PU output voltage must be set to this rule: VDD_ARM - VDD_SOC / VDD_PU < 50mV



I can't understand the meaning of description.

I understand that VDD_ARM_IN is supplied from SW1A/B of PMIC and VDD_SOC_IN and VDD_PU_IN are supplied from SW1C.

According to the Table 10 of MMPF0100's datasheet, SW1A/B and SW1C's voltage level is set to 1.375V

If I apply the above-mentioned formula, all devices can't satisfy it.



Please let me know the formula's meaning.