Output timing of PMIC_ON_REQ

[ko-hey]

Hi all

Let me confirm a output timing of PMIC_ON_REQ.

I plan to use i.MX6SL and PF0100 and understand that PMIC_ON_REQ's power source is VDD_SNVS_IN.

Which voltage level does VDD_SNVS_IN need to output a PMIC_ON_REQ ?

I concern that PMIC_ON_REQ is output before VDD_SNVS_IN reach their voltage level.

ko-hey

[igorpadykov]

Hi Ko-hey

>Which voltage level does VDD_SNVS_IN need to output a PMIC_ON_REQ ?

valid level VDD_SNVS_IN = 2.8-3.3V according to Table 9. Operating Ranges

i.MX6SL Datasheet

http://cache.freescale.com/files/32bit/doc/data_sheet/IMX6SLCEC.pdf

Best regards

igor

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[ko-hey]

Hi Igor

Thank you for your reply.

Let me confirm again.

PMIC_ON_REQ will be outputted after VDD_SNVS_IN reach 2.8V.

So it will have never happened that PMIC_ON_REQ outputs their signal before SNVS is rise-up.

Is it correct ?

Ko-hey

[igorpadykov]

Hi Ko-hey

yes in general this is correct, SNVS is correctly working

in voltage range specified by datasheet

Best regards

igor

[ko-hey]

Hi Igor

I understand.

Thanks.

Ko-hey