Unexpected value of PORPLLSR of MPC8548

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Unexpected value of PORPLLSR of MPC8548

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yanjin
Contributor I

board: MPC8548CDS

bootloader: u-boot-2015.7

problem description:

    when the uboot starts, the inital value of register porpllsr is not the expected value as the cfg_sys_pll[0:3] setting. The HW configure for cfg_sys_pll[0:3] is 0b'1010,  the plat_ratio should be 10, but the read value of plat_ratio=16, or others(the two high level usually can not be read correctly ). I'm sure the hardware is all right, and I have not changed the function of get_sysinfo() which is used for reading the PORPLLSR reg as system clock freq. so why?

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alexander_yakov
NXP Employee
NXP Employee

Please try Uboot version which we offer with our Linux BSP for this board and check if the problem appears in this case

BSPs for Power Architecture|MPC85xx|NXP

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