I am using K61 processor and am successfully communicating across UART0 and UART1, each configured with separate DMAs for RX and TX in free run. The existing solution works well when the application continuously polls the RX DMA location. However, to save power we must switch the application from constantly polling the DMA output to an interrupt-driven solution.
The ideal solution is to allow our application to stop polling the UART RX DMA output location, and use an interrupt to wake our task and begin polling UART RX DMA output. The interrupt for UART RX could be a Port interrupt (i.e. PB16_PCR register) or a UART interrupt (e.g. UART0_S2_RXEDGIE).
However, we have tested both of these solutions and enabling either of these interrupts appears to corrupt our free-running DMA in the following manner: When data is active on the UART RX pin, then the DMA runs correctly and we get data. But when data is no longer active on the UART RX pin, then the DMA stops processing/accepting new data. The remainder of the data only gets processed the next time there is active data on the UART RX pin. A strange observation is that there are always 7 bytes "missing" (i.e. not read into DMA) after the active data on the UART RX pin stops.
We want to keep DMA free-running because of the high throughput.
Are there any known issues with configuring an UART or PORT interrupts when using a UART RX in DMA free-run?