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Issue with SPI as slave mode in MKL17Z64

Question asked by vignesh mohan on Mar 4, 2016
Latest reply on Mar 7, 2016 by vignesh mohan

I am using Freescale MKL17Z64 with KSDK configured MKL17Z64 in slave mode(FIFO enabled) and sending 5 bytes (0x01,0x02,0x03,0x04,0x05) to Master. I am expecting (0x01, 0x02,0x03,0x04,0x05) in master.

I send 1st 6 dummy bytes(0xFF,0xFF,0xFF,0xFF,0xFF) from master to read slave data I get response (0x01 0xFF 0xFF 0xFF 0xFF 0xFF)  in master during this period SS is pulled low by master and same continues when I do 2nd , 3rd , 4th… dummy transfers slave responds with (0x02 0xFF 0xFF 0xFF 0xFF 0xFF)  , (0x03 0xFF 0xFF 0xFF 0xFF 0xFF)  , (0x04 0xFF 0xFF 0xFF 0xFF 0xFF) … respectively.

So every SS interrupt I get one byte transfer from Slave FIFO.


Is it possible to get all 5 bytes from slave at one shot by using single SS interrupt (OR) should we need to toggle SS for each byte?


Awaiting for your reply. Thanks in advance.