T2080 just wont come out of reset..
PORESET_N is negated by fpga
SYSCLK is stable around 50msecs before the negation of PORESET_N
However the T2080 asserted HRESET_N around 500msec earlier when all the T2080 power rails are valid..
Power rails ramp
After ramp HRESET_N driven low
CLKSYNTH_RST negated 450ms later
CLKs stable 1.5ms later
PORESET_N negated 50ms after CLKSYNTH_RSTn negated.
I see no access on I2C0.. with PORcfg resistors setup for I2C RCS access.
Additional data on images attached
Note that the name format is method_ch1_ch2_Ch3_Ch3_Num.jpg