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Is i.MX6 eCSPI SS_CTL = 0b in slave mode supported?

Question asked by Satoshi Shimoda on Feb 29, 2016
Latest reply on Feb 29, 2016 by Yuri Muhin

Hi community,

 

I have a question about i.MX6DQ eCSPI.

Please see chapter 21.4.4.2 and chapter 21.7.3 BUST_LENGTH description in IMX6DQRM (Rev.3), these describe eCSPI behavior when SS_CTL is cleared in slave mode.

On the other hand, chapter 21.4.2 says "Slave mode only supports the case when SSCTL (SSB_CTRL[x] bit) is cleared.", and chapter 21.7.4 SS_CTL description says SS_CTL=0 is reserved in slave mode.

 

Which is correct?

Is SS_CTL=0b in slave mode supported? or not supported?

 

 

Best Regards,

Satoshi Shimoda

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