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MPC560xB DSPI utilization

Question asked by Romain BENET on Feb 25, 2016
Latest reply on Feb 26, 2016 by Petr Stancik



I use the DSPI 0 on MPC560xB (it's the same for the x=4 or 6) but I have problems. I use CodeWarrior 10.6


First part:

DSPI configuration: disable TX and RX fifos and overwrite authorized (field ROOE of MCR). CPHA = 0. SPI data size = 16 bits. DSPI_0 in master mode.


When I compile it I should write bit to bit for disabling RX and TX fifos (DSPI_0.MCR.B.DIS_RXF = 1 then DSPI_0.MCR.B.DIS_TXF = 1)

else fifos are again available when I write DSPI_0.MCR.R = 0x813F3001. Why?


And for the ROOE option of MCR register my debugger indicates that ROOE = 1 means incoming data is ignored (no overwritte).

What is the good definition of ROOE (datasheet or debugger)?



Second part: reading incoming data from SPI bus

I send by example 2 datas on SPI bus then I send another data for reading input data:


/** Send 0xFF00 to CS0 and CS0 still asserted after transaction */

DSPI_0.PUSHR.R = 0x8001FF00;

while (DSPI_0.SR.B.TCF == 0) {}

DSPI_0.SR.B.TCF = 1;

/** Send 0xF0F0 to CS0 and CS0 still asserted after transaction */

DSPI_0.PUSHR.R = 0x80010F0F;

while (DSPI_0.SR.B.TCF == 0) {}

DSPI_0.SR.B.TCF = 1;

/** Now I send a dummy command for reading SPI slave */

/** Clear previous data receiving */

u16DataRead = DSPI_0.POPR.R;


/** Send dummy order to CS0  - last transaction of the command of 3 transactions */

DSPI_0.PUSHR.R = 0x000155AA;

while(DSPI_0.SR.B.RFDF == 0) {}

/** We receive data */

u16DataRead = DSPI.POPR.R;

DSPI_0.SR.R = 0x80020000;



For checking that my code is right I connect the S_OUT to S_IN of DSPI_0: input data = output data.

When I send data no problem (S_OUT).


My problems: the MPC560xB doesn't clear flags at DSPI_0.SR.R = 0x8002000 instruction: I have to clear bit to bit (TCF then RFDF fields of SR register). Why?

                       and the incoming data u16DataRead equals to 0x0F0F = previous sending and not 0x55AA. Why?

What is the good pratice for reading SPI input data when fifos are disables (like in my example).



Best regards,


Romain BENET