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MC9S12G240MLF "margin levels"

Question asked by Paul Alves on Feb 22, 2016
Latest reply on Feb 23, 2016 by Paul Alves

If we consider "1" to be the erased state for a bit and "0" to be the programmed state, then we can say that high levels are erased and low levels are programmed.

 

I think I get the basis of margin levels, in so far as setting the margin level to "1" increases the threshold to make it more likely to read a "0". We would use it after an erase to make sure there was a margin between the normal read level and the programmed voltage level to guarantee that we would read a "1" everywhere.

 

And of course the opposite is true of "0". We would use a margin level of "0" that would reduce the threshold, to make sure that bits that have been programmed still come back as "0" even after the threshold had been lowered.

 

My question is when do "user" margin levels apply and when do "field" margin levels apply? According to data sheets they both apply on subsequent reads?

 

Also, "field" margin levels can be set more sever than "user" margin levels. What is the difference in programming and erase methods that make "field" margin levels applicable over "user" levels?

 

Thanks.

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