We not set CCM_CLPCR，and use 0x79 as the default value. we find sometimes after cpu0 go to idle,the cpu0 no longer response any another interrupt(inclued serial port interrupt). cpu0 use WFI instructions go to idle.
When we cancel WFI in idle, this problem disappear. we set CCM_CLPCR bit[1:0] to 00,this problem also disappear. we find that "ERR007265 CCM: When improper low-power sequence is used, the SoC enters low power mode before the ARM core executes WFI" in <<Chip Errata for the i.MX 6Dual/6Quad>>, and in imx6_set_lpm() function seem adopt this solution.
I want to know is my porlem is same with "ERR007265 CCM" ? How to understand annotation in imx6_set_lpm() function below:
"... Otherwise, CCM may enter LPM mode by mistake which will cause system bus locked by CPU access not finished, as when CCM enter LPM mode, CPU will stop running."