I am having trouble with writing to EEPROM on the MC9S08PA4 (Processor is the 0N36F mask).
When I STEP through the setup of FCLKDIV, from POINT A to POINT B below, I see the expected value gets placed in NVM_FCLKDIV but if I RUN the code I see 0x88 rather than the expected 0x81. I have included a code snippet showing the EEPROM setup code and also included the clock setup since that has a bearing on FCLKDIV.
This also affects my ability to program the EEPROM. I have the same issue when loading NVM_FCCOBIX and NVM_FCCOB: if I STEP through loading these registers then the data gets stored in the EEPROM but if I RUN the code then I get nothing. Any ideas?
CODE SNIPPET:
icsc1_init: EQU %00000100 ;Initialization for ICS_C1.
icsc2_init: EQU %01100000 ;Initialization for ICS_C2.
ftrim_address: EQU $FF6E
select_ftrim: EQU %00000001
icstrim_address: EQU $FF6F
using_2MHz_clk: EQU %00000001
select_error_bits: EQU %00110000
INITIALIZE CLOCK:
LDA #icsc2_init ;Initialize
STA ICS_C2 ;ICS_C2
LDA #icsc1_init ;Initialize
STA ICS_C1 ;ICS_C1
LDHX #ftrim_address ;Point to FTRIM byte placed by debugger into flash.
LDA ,X ;Get the ICSFTRIM byte from FLASH at 0xFF6E
AND #select_ftrim ;Clear all but the trim bit.
STA ICS_C4 ;ICS_C4
LDHX #icstrim_address ;Point to ICSTRIM byte placed by debugger into flash.
LDA ,X ;Get the ICSTRIM value from FLASH at 0xFF6F
STA ICS_C3 ;ICS_C3
SETUP EEPROM:
JSR Feed_dog ;Service watchdog.
;---SET INTERRUPT MASK---
SEI
;---ENSURE FDIV CLOCK HAS BEEN SET SINCE RESET---
LDA NVM_FCLKDIV ;Has FDIV been written since reset?
BMI Es_clear_err ;If yes, then continue.
;---LOOP UNTIL PREVIOUS WRITE IS FINISHED---
Es_ccif_loop:
LDA NVM_FSTAT ;First ensure a flash command
BPL Es_ccif_loop ;is not being written.
;---CLEAR ERROR FLAGS---
ORA #select_error_bits ;Clear error
STA NVM_FSTAT ;flags.
<<< POINT A >>>
;---WRITE FCLKDIV[FDIV]---
LDA #using_2MHz_clk ;Store FDIV
STA NVM_FCLKDIV ;into FCLKDIV.
;---ENSURE FDIV CLOCK HAS BEEN SET SINCE RESET---
Es_clock_loop:
LDA NVM_FCLKDIV ;Has FCLKDIV
BPL Es_clock_loop ;been written to?
;---LOOP UNTIL PREVIOUS WRITE IS FINISHED---
Es_ccif_loop2:
LDA NVM_FSTAT ;First ensure a flash command
BPL Es_ccif_loop2 ;is not being written.
Es_clear_err:
;---CLEAR ERROR FLAGS---
LDA NVM_FSTAT ;Clear
ORA #select_error_bits ;error
STA NVM_FSTAT ;flags.
Eeprom_end_setup:
<<< POINT B >>>
