I using K20 (MK20FX512VLQ12 specifically). It is in a system with other processors, with a 'Master' processor that can put the K20 in EZPort mode to reprogram it.
What I can't see from the documentation is exactly when the \EZP_CS line is checked to determine if is going into EZPort mode.
If the external reset pin is driven low, and then goes high. When is the \EZP_CS checked?
I see from the reference manual (K20P144M120SF3RM Rev. 3, November 2014):
"The device's functional mode is controlled by the state of the EzPort chip select
(EZP_CS) pin during reset."
In the boot sequence (step 4) it says:
"EzPort mode is selected instead of the normal CPU execution if EZP_CS is low when the internal reset is deasserted."
But this sequence seems to refer to power-up explicitly. As it also indicates it looks at the \RESET pin after this (in step 5).
When is 'internal reset' deasserted, relative to power-up, and relative to having \RESET pin driven low and then high externally?