iMX6 General Purpose Timer

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iMX6 General Purpose Timer

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dirkschäfer
Contributor III

Hello all,

I start the clock for the GPT by writing the bits 20-23 in CCM_CCGR1.

Set the prescaler register to 0, reset the GPT, writing 1<<15 to the control register, waiting until (1<<15) is 0.

Writing 1<<18 + 1<<16 + 1<<9 + 4<<6 + 1

capture on rising edge

restart mode

low frequency clock

enable

The counter register, 0x02098024, stays 0, so the status register.

Did I forgot something?

Many thanks for your help.

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igorpadykov
NXP Employee
NXP Employee

Hi Dirk

one can verify input signal, it should be stable at least for two low frequency clocks

also check attached example from sdk and its description in chapter14.

Best regards

igor

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igorpadykov
NXP Employee
NXP Employee

Hi Dirk

one can verify input signal, it should be stable at least for two low frequency clocks

also check attached example from sdk and its description in chapter14.

Best regards

igor

-----------------------------------------------------------------------------------------------------------------------

Note: If this post answers your question, please click the Correct Answer button. Thank you!

-----------------------------------------------------------------------------------------------------------------------

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dirkschäfer
Contributor III

Following IMX6DQRM.PDF

// disable

control= 0;

m_ctlReg.SetValue( control);

// peripheral clock

control |= 1<<6;

m_ctlReg.SetValue( control);

// software reset

control |= (1<<15);

m_ctlReg.SetValue( control);

while( (m_ctlReg.GetValue()&(1<<15)) != 0 );

// remove SWR bit

control &= ~(1<<15);

// Status reset

m_statusReg.SetValue(0x0000003F);

// ENMOD, resets counter & prescaler

control |= 2;

m_ctlReg.SetValue(control);

// start

control |= 1;

m_ctlReg.SetValue(control);

Counter counts.

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