Refer to DDR_SEL in IOMUXC_SW_PAD_CTL_GRP_DDR_TYPE_RGMII in IMX6DQRM(Rev.3).
10 1P2V_IO— 1.2V I/O interfaces including USB HSIC and MIPI_HSI. Provides calibrated drive
strengths for signals ranging from 1.0V up to 1.3V.
11 1P5V_IO— 1.5V I/O interfaces including ENET. Provides calibrated drive strengths for signals
ranging from 1.3V to 2.5V.
SABRE-SD uses the RGMII with 1.5V IO.
But, the register was set "10 1P2V_IO" in SABRE-SD with NXP Linux BSP (L3.14.28, L3.10.17, L3.0,35...).
On the other hand, there was below description in Hardware Design Guide.
Regardless of the voltage level, he ddr_sel of IOMUXC_SW_PAD_CTL_GRP_DDR_TYPE_RGMII should always be set to ‘11’.
Q1. Is there any problem when selecting DDR_SEL=10(1.2V_IO) for 1.5V IO RGMII?
Q2. May we use as DDR_SEL=10(1.2V_IO) for final product?