Hello Daniel,
I have checked your issues:
Issue 1:
The Slow internal reference clock property provides support for ICS trim adjustment by other tools (e.g. debugger). The hint of this property states "It is responsibility of the user to correctly set the trim register." This property is only used for calculation of the clock frequencies (clock signals) that are based on this internal oscillator.
There is the Initialize slow trim value property group that allows you to set the exact values of trim registers but these values are not computed (it is your responsibility to set requested values of trim registers), see below:
The default value of the Slow Internal reference clock property contains factory trimmed value of the internal oscillator. But there is not any exact algorithm how to set trim value according to requested value (due to dispersion during manufacturing).
Therefore you can set the value that is in the defined range (defined in datasheet of the MCU and also provided in the hint of this property) and use debugger to adjust precise value of this internal oscillator. For example PEMicro provide the following advanced options (Program Trim Registers):
This feature allows you to precisely set the trim registers.
Issue 2:
I have reproduced the problem. When you select the FBELP ICS mode the Processor Expert does not set the ICS_C1 register in the generated code (it remain in the after reset state - FEI mode). I have reported this issue to the Processor Expert development team (PEXMCU-4163).
Best Regards,
Marek Neuzil
Hello Daniel,
I have checked your issues:
Issue 1:
The Slow internal reference clock property provides support for ICS trim adjustment by other tools (e.g. debugger). The hint of this property states "It is responsibility of the user to correctly set the trim register." This property is only used for calculation of the clock frequencies (clock signals) that are based on this internal oscillator.
There is the Initialize slow trim value property group that allows you to set the exact values of trim registers but these values are not computed (it is your responsibility to set requested values of trim registers), see below:
The default value of the Slow Internal reference clock property contains factory trimmed value of the internal oscillator. But there is not any exact algorithm how to set trim value according to requested value (due to dispersion during manufacturing).
Therefore you can set the value that is in the defined range (defined in datasheet of the MCU and also provided in the hint of this property) and use debugger to adjust precise value of this internal oscillator. For example PEMicro provide the following advanced options (Program Trim Registers):
This feature allows you to precisely set the trim registers.
Issue 2:
I have reproduced the problem. When you select the FBELP ICS mode the Processor Expert does not set the ICS_C1 register in the generated code (it remain in the after reset state - FEI mode). I have reported this issue to the Processor Expert development team (PEXMCU-4163).
Best Regards,
Marek Neuzil
Hello,
I have received the following workaround from the Processor Expert development team for the issue #2:
1 - Select the FBE mode of the ISC (select the FBE in the ICS mode property).
2 - Navigate to 'Build options' tab in the Components Inspector of the CPU. Find 'User code after PE initialization' property. Enter following code to the string list:
ICS_C2 |= ICS_C2_LP_MASK;
The property allows to generate any user code right at the end of __Init_hardware() function, where the clock are configured. The code sets low power mode, i.e. FBELP ICS mode.
The initialization code generated (CPU.c program module) by Processor Expert is:
void __init_hardware(void)
{
. . .
. . .
/* System clock initialization */
/* SIM_BUSDIV: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,BUSDIV=0 */
SIM_BUSDIV = 0x00U; /* Update system prescalers */
/* Switch to FBE Mode */
/* ICS_C2: BDIV=0,LP=0 */
ICS_C2 &= (uint8_t)~(uint8_t)((ICS_C2_BDIV(0x07) | ICS_C2_LP_MASK));
/* OSC_CR: OSCEN=1,??=0,OSCSTEN=0,OSCOS=1,??=0,RANGE=1,HGO=0,OSCINIT=0 */
OSC_CR = (OSC_CR_OSCEN_MASK | OSC_CR_OSCOS_MASK | OSC_CR_RANGE_MASK);
/* ICS_C1: CLKS=2,RDIV=3,IREFS=0,IRCLKEN=1,IREFSTEN=0 */
ICS_C1 = (ICS_C1_CLKS(0x02) | ICS_C1_RDIV(0x03) | ICS_C1_IRCLKEN_MASK);
while((ICS_S & ICS_S_IREFST_MASK) != 0x00U) { /* Check that the source of the FLL reference clock is the external reference clock. */
}
while((ICS_S & 0x0CU) != 0x08U) { /* Wait until external reference clock is selected as ICS output */
}
/*** End of PE initialization code after reset ***/
/*** User code after PE initialization and before C initialization ***/
ICS_C2 |= ICS_C2_LP_MASK;
/*** End of user code after PE initialization and before C initialization ***/
}
This code allows proper switching from the FBE mode to the FBELP mode according to the following diagram from the reference manual:
Best regards,
Marek Neuzil
